<?xml version="1.0" encoding="UTF-8"?>
<rss version="2.0" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/">
	<channel>
		<title><![CDATA[Geeks for your information - Tech News]]></title>
		<link>https://www.geeks.fyi/</link>
		<description><![CDATA[Geeks for your information - https://www.geeks.fyi]]></description>
		<pubDate>Tue, 28 Apr 2026 18:01:37 +0000</pubDate>
		<generator>MyBB</generator>
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			<title><![CDATA[AMD EXPO 1.2 now available, adds partial CUDIMM support and three new Chinese memory]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21919</link>
			<pubDate>Sun, 26 Apr 2026 11:40:52 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21919</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">1usmus reveals AMD EXPO 1.2 details</span><br />
<br />
<span style="font-weight: bold;" class="mycode_b">AMD EXPO 1.2 reportedly adds MRDIMM support, full CUDIMM support expected with Zen 6</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/04/AMD-EXPO-1.2-LOGO-1200x660.jpg" loading="lazy"  alt="[Image: AMD-EXPO-1.2-LOGO-1200x660.jpg]" class="mycode_img" /><br />
AMD EXPO 1.2 is now said to bring a wider memory profile update than previously expected. According to 1usmus, the new revision adds support for module geometry and <span style="font-weight: bold;" class="mycode_b">MRDIMM</span> memory. <span style="font-weight: bold;" class="mycode_b">CUDIMM</span> and <span style="font-weight: bold;" class="mycode_b">CSODIMM</span> are also part of the EXPO 1.2 path, although CUDIMM support is still limited on current firmware.<br />
<br />
Only partial support, full support with Zen6The developer claims AGESA 1.3.0.1 does not yet include full CUDIMM support. AMD is reportedly preparing that part for Zen 6, which suggests current AM5 platforms may expose EXPO 1.2 metadata before full clocked module support is available. This follows earlier coverage when HWiNFO added AMD EXPO 1.20 support and 1usmus linked the update to CUDIMM memory support.<br />
<br />
<a href="https://videocardz.com/newz/amd-expo-1-2-now-available-adds-partial-cudimm-support-and-three-new-chinese-memory-vendors" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">1usmus reveals AMD EXPO 1.2 details</span><br />
<br />
<span style="font-weight: bold;" class="mycode_b">AMD EXPO 1.2 reportedly adds MRDIMM support, full CUDIMM support expected with Zen 6</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/04/AMD-EXPO-1.2-LOGO-1200x660.jpg" loading="lazy"  alt="[Image: AMD-EXPO-1.2-LOGO-1200x660.jpg]" class="mycode_img" /><br />
AMD EXPO 1.2 is now said to bring a wider memory profile update than previously expected. According to 1usmus, the new revision adds support for module geometry and <span style="font-weight: bold;" class="mycode_b">MRDIMM</span> memory. <span style="font-weight: bold;" class="mycode_b">CUDIMM</span> and <span style="font-weight: bold;" class="mycode_b">CSODIMM</span> are also part of the EXPO 1.2 path, although CUDIMM support is still limited on current firmware.<br />
<br />
Only partial support, full support with Zen6The developer claims AGESA 1.3.0.1 does not yet include full CUDIMM support. AMD is reportedly preparing that part for Zen 6, which suggests current AM5 platforms may expose EXPO 1.2 metadata before full clocked module support is available. This follows earlier coverage when HWiNFO added AMD EXPO 1.20 support and 1usmus linked the update to CUDIMM memory support.<br />
<br />
<a href="https://videocardz.com/newz/amd-expo-1-2-now-available-adds-partial-cudimm-support-and-three-new-chinese-memory-vendors" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[DLSS 4.5 SDK arrives with Dynamic Multi Frame Generation support]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21890</link>
			<pubDate>Wed, 22 Apr 2026 06:43:40 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21890</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">NVIDIA releases DLSS 4.5 SDK with Dynamic Multi Frame Generation and 6X mode</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/NVIDIA-DLSS-4.5-DYNAMIC-FRAME-GEN-HERO-1200x630.jpg" loading="lazy"  alt="[Image: NVIDIA-DLSS-4.5-DYNAMIC-FRAME-GEN-HERO-1200x630.jpg]" class="mycode_img" /><br />
<br />
NVIDIA has released the DLSS 4.5 SDK for developers, adding support for<span style="font-weight: bold;" class="mycode_b"> DLSS 4.5 Dynamic Multi Frame Generation and Multi Frame Generation 6X.</span> The SDK is now available and gives developers access to its newest Super Resolution and Frame Generation updates. <br />
<br />
According to NVIDIA, the SDK is built on Streamline and is meant to give studios one integration path across DLSS features. NVIDIA also says the package includes updated APIs, documentation, and sample code, which should make it easier to add features such as Ray Reconstruction or Dynamic Multi Frame Generation to both new and existing games. <br />
<br />
<img src="https://cdn.videocardz.com/1/2026/04/NVIDIA-DLSS-310_6_0-SDK-HERO-850x367.png" loading="lazy"  alt="[Image: NVIDIA-DLSS-310_6_0-SDK-HERO-850x367.png]" class="mycode_img" /><br />
Source: Github<br />
<br />
<a href="https://videocardz.com/newz/dlss-4-5-sdk-arrives-with-dynamic-multi-frame-generation-support" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">NVIDIA releases DLSS 4.5 SDK with Dynamic Multi Frame Generation and 6X mode</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/NVIDIA-DLSS-4.5-DYNAMIC-FRAME-GEN-HERO-1200x630.jpg" loading="lazy"  alt="[Image: NVIDIA-DLSS-4.5-DYNAMIC-FRAME-GEN-HERO-1200x630.jpg]" class="mycode_img" /><br />
<br />
NVIDIA has released the DLSS 4.5 SDK for developers, adding support for<span style="font-weight: bold;" class="mycode_b"> DLSS 4.5 Dynamic Multi Frame Generation and Multi Frame Generation 6X.</span> The SDK is now available and gives developers access to its newest Super Resolution and Frame Generation updates. <br />
<br />
According to NVIDIA, the SDK is built on Streamline and is meant to give studios one integration path across DLSS features. NVIDIA also says the package includes updated APIs, documentation, and sample code, which should make it easier to add features such as Ray Reconstruction or Dynamic Multi Frame Generation to both new and existing games. <br />
<br />
<img src="https://cdn.videocardz.com/1/2026/04/NVIDIA-DLSS-310_6_0-SDK-HERO-850x367.png" loading="lazy"  alt="[Image: NVIDIA-DLSS-310_6_0-SDK-HERO-850x367.png]" class="mycode_img" /><br />
Source: Github<br />
<br />
<a href="https://videocardz.com/newz/dlss-4-5-sdk-arrives-with-dynamic-multi-frame-generation-support" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[AMD ROCm 7.2.2 Brings Optimization Guide For Ryzen AI / RDNA 3.5 Hardware]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21879</link>
			<pubDate>Tue, 21 Apr 2026 06:57:25 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21879</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite>ROCm 7.2.2 is out today as a small point release to this open-source AMD GPU compute stack. There are a few code changes but most notable is arguably on the documentation side.<br />
<br />
It's been just a few weeks since <a href="https://www.phoronix.com/news/AMD-ROCm-7.2.1" target="_blank" rel="noopener" class="mycode_url">ROCm 7.2.1</a> and thus ROCm 7.2.2 is on the very lightweight side. ROCm 7.2.2 brings a fix for a ROCTracer reporting failure, updated user-space/driver/firmware dependency details, and ROCm documentation updates.<br />
<br />
On the documentation side there is now an AMD RDNA 3.5 system optimization page that outlines optimization details for AMD Ryzen AI NPUs with RDNA 3.5 graphics. This is focused on both Ryzen AI systems with RDNA 3.5 like Strix Point and the flagship Ryzen AI Max "Strix Halo" platforms that have seen much ROCm/compute interest from the community thanks to its very powerful integrated graphics.<br />
<br />
The AMD RDNA 3.5 system optimization page outlines recommended memory settings/tunables, configuring shared memory limits under Linux, operating system support, Linux kernel version requirements, and other details.<br />
<br />
<a href="https://www.phoronix.com/news/AMD-ROCm-7.2.2" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite>ROCm 7.2.2 is out today as a small point release to this open-source AMD GPU compute stack. There are a few code changes but most notable is arguably on the documentation side.<br />
<br />
It's been just a few weeks since <a href="https://www.phoronix.com/news/AMD-ROCm-7.2.1" target="_blank" rel="noopener" class="mycode_url">ROCm 7.2.1</a> and thus ROCm 7.2.2 is on the very lightweight side. ROCm 7.2.2 brings a fix for a ROCTracer reporting failure, updated user-space/driver/firmware dependency details, and ROCm documentation updates.<br />
<br />
On the documentation side there is now an AMD RDNA 3.5 system optimization page that outlines optimization details for AMD Ryzen AI NPUs with RDNA 3.5 graphics. This is focused on both Ryzen AI systems with RDNA 3.5 like Strix Point and the flagship Ryzen AI Max "Strix Halo" platforms that have seen much ROCm/compute interest from the community thanks to its very powerful integrated graphics.<br />
<br />
The AMD RDNA 3.5 system optimization page outlines recommended memory settings/tunables, configuring shared memory limits under Linux, operating system support, Linux kernel version requirements, and other details.<br />
<br />
<a href="https://www.phoronix.com/news/AMD-ROCm-7.2.2" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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			<title><![CDATA[Mozilla's MZLA Technologies Launches Thunderbolt, an Open-Source Self-Hosted Enterpri]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21877</link>
			<pubDate>Mon, 20 Apr 2026 08:43:41 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21877</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite>MZLA Technologies, a subsidiary of <a href="https://www.ghacks.net/2026/03/24/mozilla-releases-firefox-149-with-split-view-and-security-improvements/" target="_blank" rel="noopener" class="mycode_url">Mozilla</a>, has launched <a href="https://www.thunderbird.net/en-US/" target="_blank" rel="noopener" class="mycode_url">Thunderbolt</a>, an open-source AI client aimed at enterprise use on private infrastructure. The tool offers a unified interface for chat, search, and research functions, connecting to internal AI models, data sources, and automation pipelines.<br />
<br />
The source code is available on GitHub, and organizations interested can join a waitlist at <span style="font-weight: bold;" class="mycode_b">thunderbolt.io.</span><br />
<br />
<span style="font-weight: bold;" class="mycode_b">What Thunderbolt Does</span><br />
<br />
<img src="https://www.ghacks.net/wp-content/uploads/2026/04/Screenshot-2026-04-20-at-09.25.47-scaled.png" loading="lazy"  alt="[Image: Screenshot-2026-04-20-at-09.25.47-scaled.png]" class="mycode_img" /><br />
<br />
Thunderbolt functions as an <span style="font-weight: bold;" class="mycode_b">AI workspace</span> that connects directly to an organization's existing systems, instead of routing data through external hosted AI services. Administrators can choose which AI models to run behind the interface, supporting commercial services, open-source models, and locally hosted systems.<br />
<br />
Integration options include DeepSet's Haystack platform for backend orchestration, Model Context Protocol servers, and Agent Client Protocol agents. The Haystack integration connects the Thunderbolt interface with backend tools responsible for model selection, retrieval, and automated responses.<br />
<br />
This setup allows organizations to connect internal pipelines without needing to rewrite existing infrastructure.<br />
<br />
<span style="font-weight: bold;" class="mycode_b">Automation Features and Cross-Platform Support</span><br />
<br />
Thunderbolt offers automation features for scheduling and repeating tasks. This includes generating daily briefings, monitoring specific topics, compiling reports, and triggering actions based on incoming data. These functions can be set up within the client environment without relying on external cloud services.<br />
<br />
Native applications are available for Windows, macOS, Linux, iOS, and Android, enabling staff to access the same AI environment across desktop and mobile devices.<br />
<br />
<a href="https://www.ghacks.net/2026/04/20/mozillas-mzla-technologies-launches-thunderbolt-an-open-source-self-hosted-enterprise-ai-client/" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite>MZLA Technologies, a subsidiary of <a href="https://www.ghacks.net/2026/03/24/mozilla-releases-firefox-149-with-split-view-and-security-improvements/" target="_blank" rel="noopener" class="mycode_url">Mozilla</a>, has launched <a href="https://www.thunderbird.net/en-US/" target="_blank" rel="noopener" class="mycode_url">Thunderbolt</a>, an open-source AI client aimed at enterprise use on private infrastructure. The tool offers a unified interface for chat, search, and research functions, connecting to internal AI models, data sources, and automation pipelines.<br />
<br />
The source code is available on GitHub, and organizations interested can join a waitlist at <span style="font-weight: bold;" class="mycode_b">thunderbolt.io.</span><br />
<br />
<span style="font-weight: bold;" class="mycode_b">What Thunderbolt Does</span><br />
<br />
<img src="https://www.ghacks.net/wp-content/uploads/2026/04/Screenshot-2026-04-20-at-09.25.47-scaled.png" loading="lazy"  alt="[Image: Screenshot-2026-04-20-at-09.25.47-scaled.png]" class="mycode_img" /><br />
<br />
Thunderbolt functions as an <span style="font-weight: bold;" class="mycode_b">AI workspace</span> that connects directly to an organization's existing systems, instead of routing data through external hosted AI services. Administrators can choose which AI models to run behind the interface, supporting commercial services, open-source models, and locally hosted systems.<br />
<br />
Integration options include DeepSet's Haystack platform for backend orchestration, Model Context Protocol servers, and Agent Client Protocol agents. The Haystack integration connects the Thunderbolt interface with backend tools responsible for model selection, retrieval, and automated responses.<br />
<br />
This setup allows organizations to connect internal pipelines without needing to rewrite existing infrastructure.<br />
<br />
<span style="font-weight: bold;" class="mycode_b">Automation Features and Cross-Platform Support</span><br />
<br />
Thunderbolt offers automation features for scheduling and repeating tasks. This includes generating daily briefings, monitoring specific topics, compiling reports, and triggering actions based on incoming data. These functions can be set up within the client environment without relying on external cloud services.<br />
<br />
Native applications are available for Windows, macOS, Linux, iOS, and Android, enabling staff to access the same AI environment across desktop and mobile devices.<br />
<br />
<a href="https://www.ghacks.net/2026/04/20/mozillas-mzla-technologies-launches-thunderbolt-an-open-source-self-hosted-enterprise-ai-client/" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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			<title><![CDATA[Intel shows Texture Set Neural Compression, claims up to 18x smaller texture sets]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21779</link>
			<pubDate>Mon, 06 Apr 2026 07:39:15 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21779</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">TSNC Variant A delivers 9x texture compression, lower-quality B variant up to 18x</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/04/INTEL-TEXTURE-SET-NEURAL-COMPRESSION-TSNC-GDC2026-HERO2-1200x624.jpg" loading="lazy"  alt="[Image: INTEL-TEXTURE-SET-NEURAL-COMPRESSION-TSN...00x624.jpg]" class="mycode_img" /><br />
<br />
Intel has shared new details on <span style="font-weight: bold;" class="mycode_b">Texture Set Neural Compression, or TSNC,</span> a neural texture compression technology first shown as an Intel Labs research demo at GDC 2025. The company now says it has rebuilt the project into a standalone SDK, with a new decompression API that can compile to C, C++, or HLSL. Intel says the decoder supports both a fallback fused multiply-add path for CPU and GPU, and a linear algebra path that uses XMX acceleration on supported Intel GPUs.<br />
<br />
This is yet another compression algorithm based on neural networks, followed by NVIDIA, who <a href="https://videocardz.com/newz/nvidia-shows-neural-texture-compression-cutting-vram-from-6-5gb-to-970mb" target="_blank" rel="noopener" class="mycode_url">also held a GDC talk</a> and mentioned up to 85% compression. Intel is working on two variants, <span style="font-weight: bold;" class="mycode_b">one offering up to 9x compression and another up to 18x. </span><br />
<br />
<span style="font-weight: bold;" class="mycode_b">TSNC vs BC1</span><br />
<br />
The basic idea is to go beyond standard block compression by training a neural network to encode and decode a set of textures together. Intel stores the latent data in a four-layer BC1-based feature pyramid, then reconstructs the original texture channels through a three-layer MLP decoder. <br />
<br />
<a href="https://videocardz.com/newz/intel-shows-texture-set-neural-compression-claims-up-to-18x-smaller-texture-sets" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">TSNC Variant A delivers 9x texture compression, lower-quality B variant up to 18x</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/04/INTEL-TEXTURE-SET-NEURAL-COMPRESSION-TSNC-GDC2026-HERO2-1200x624.jpg" loading="lazy"  alt="[Image: INTEL-TEXTURE-SET-NEURAL-COMPRESSION-TSN...00x624.jpg]" class="mycode_img" /><br />
<br />
Intel has shared new details on <span style="font-weight: bold;" class="mycode_b">Texture Set Neural Compression, or TSNC,</span> a neural texture compression technology first shown as an Intel Labs research demo at GDC 2025. The company now says it has rebuilt the project into a standalone SDK, with a new decompression API that can compile to C, C++, or HLSL. Intel says the decoder supports both a fallback fused multiply-add path for CPU and GPU, and a linear algebra path that uses XMX acceleration on supported Intel GPUs.<br />
<br />
This is yet another compression algorithm based on neural networks, followed by NVIDIA, who <a href="https://videocardz.com/newz/nvidia-shows-neural-texture-compression-cutting-vram-from-6-5gb-to-970mb" target="_blank" rel="noopener" class="mycode_url">also held a GDC talk</a> and mentioned up to 85% compression. Intel is working on two variants, <span style="font-weight: bold;" class="mycode_b">one offering up to 9x compression and another up to 18x. </span><br />
<br />
<span style="font-weight: bold;" class="mycode_b">TSNC vs BC1</span><br />
<br />
The basic idea is to go beyond standard block compression by training a neural network to encode and decode a set of textures together. Intel stores the latent data in a four-layer BC1-based feature pyramid, then reconstructs the original texture channels through a three-layer MLP decoder. <br />
<br />
<a href="https://videocardz.com/newz/intel-shows-texture-set-neural-compression-claims-up-to-18x-smaller-texture-sets" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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			<title><![CDATA[NVIDIA launches DLSS 4.5 Dynamic Multi Frame Generation and 6X mode through app beta]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21702</link>
			<pubDate>Wed, 01 Apr 2026 07:16:14 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21702</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">NVIDIA adds even more AI frames</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/NVIDIA-DLSS-MFG-6X-HERO-1200x656.jpg" loading="lazy"  alt="[Image: NVIDIA-DLSS-MFG-6X-HERO-1200x656.jpg]" class="mycode_img" /><br />
<br />
NVIDIA has started rolling out DLSS 4.5 Dynamic Multi Frame Generation and Multi Frame Generation 6X through the opt-in NVIDIA app beta. The new overrides are limited to <span style="font-weight: bold;" class="mycode_b">GeForce RTX 50 Series GPUs,</span> and NVIDIA says GeForce Game Ready Driver 595.97 WHQL or newer is required. Needless to say, this update is only for RTX 50 owners, NVIDIA even provided a chart that shows RTX 40 clearly falling behind in supported features. <br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/nvidia-dlss-4-5-feature-support-chart.png" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/nvidia-dlss-4-5-feature-support-chart-850x465.png" loading="lazy"  alt="[Image: nvidia-dlss-4-5-feature-support-chart-850x465.png]" class="mycode_img" /></a><br />
Source: NVIDIA<br />
<br />
The new Dynamic mode replaces a fixed frame multiplier with an adaptive system that changes in real time based on GPU load and the display target. NVIDIA says the feature is designed to generate only the number of frames needed to reach a chosen cap or the monitor refresh rate, instead of staying locked to one preset multiplier throughout gameplay. <br />
<br />
<a href="https://videocardz.com/newz/nvidia-launches-dlss-4-5-dynamic-multi-frame-generation-and-6x-mode-through-app-beta" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">NVIDIA adds even more AI frames</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/NVIDIA-DLSS-MFG-6X-HERO-1200x656.jpg" loading="lazy"  alt="[Image: NVIDIA-DLSS-MFG-6X-HERO-1200x656.jpg]" class="mycode_img" /><br />
<br />
NVIDIA has started rolling out DLSS 4.5 Dynamic Multi Frame Generation and Multi Frame Generation 6X through the opt-in NVIDIA app beta. The new overrides are limited to <span style="font-weight: bold;" class="mycode_b">GeForce RTX 50 Series GPUs,</span> and NVIDIA says GeForce Game Ready Driver 595.97 WHQL or newer is required. Needless to say, this update is only for RTX 50 owners, NVIDIA even provided a chart that shows RTX 40 clearly falling behind in supported features. <br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/nvidia-dlss-4-5-feature-support-chart.png" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/nvidia-dlss-4-5-feature-support-chart-850x465.png" loading="lazy"  alt="[Image: nvidia-dlss-4-5-feature-support-chart-850x465.png]" class="mycode_img" /></a><br />
Source: NVIDIA<br />
<br />
The new Dynamic mode replaces a fixed frame multiplier with an adaptive system that changes in real time based on GPU load and the display target. NVIDIA says the feature is designed to generate only the number of frames needed to reach a chosen cap or the monitor refresh rate, instead of staying locked to one preset multiplier throughout gameplay. <br />
<br />
<a href="https://videocardz.com/newz/nvidia-launches-dlss-4-5-dynamic-multi-frame-generation-and-6x-mode-through-app-beta" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[Google has officially moved its advanced ransomware detection and file restoration fe]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21701</link>
			<pubDate>Tue, 31 Mar 2026 09:00:20 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21701</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Anti-Lag 2 is no more?</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/FSR-LATENCY-REDUCTION-2-HERO-1200x624.jpg" loading="lazy"  alt="[Image: FSR-LATENCY-REDUCTION-2-HERO-1200x624.jpg]" class="mycode_img" /><br />
<br />
As you may recall, around November, just weeks before the Redstone release, AMD made a quiet change to its technology stack. With AMD, it is often hard to keep track of what the company is doing, because it tends to leave many changes unannounced. <a href="https://videocardz.com/newz/with-fsr-redstone-coming-amd-shortens-fidelityfx-super-resolution-name-to-just-fsr" target="_blank" rel="noopener" class="mycode_url">The quiet renaming</a> of various FidelityFX technologies to simply “FSR” was not officially highlighted and was only noticed after we spotted the change on AMD’s website.<br />
<br />
As a result, FidelityFX Super Resolution simply became FSR Upscaling. Frame Generation also received the FSR prefix, and AMD added FSR Ray Regeneration and Radiance Caching alongside the Redstone release. Redstone is easily AMD’s slowest technology rollout yet. It is currently available in just two games, and not even with the full stack, because Radiance Caching is not available anywhere yet.<br />
<br />
<a href="https://videocardz.com/newz/amd-renames-anti-lag-2-to-fsr-latency-reduction-2" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Anti-Lag 2 is no more?</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/FSR-LATENCY-REDUCTION-2-HERO-1200x624.jpg" loading="lazy"  alt="[Image: FSR-LATENCY-REDUCTION-2-HERO-1200x624.jpg]" class="mycode_img" /><br />
<br />
As you may recall, around November, just weeks before the Redstone release, AMD made a quiet change to its technology stack. With AMD, it is often hard to keep track of what the company is doing, because it tends to leave many changes unannounced. <a href="https://videocardz.com/newz/with-fsr-redstone-coming-amd-shortens-fidelityfx-super-resolution-name-to-just-fsr" target="_blank" rel="noopener" class="mycode_url">The quiet renaming</a> of various FidelityFX technologies to simply “FSR” was not officially highlighted and was only noticed after we spotted the change on AMD’s website.<br />
<br />
As a result, FidelityFX Super Resolution simply became FSR Upscaling. Frame Generation also received the FSR prefix, and AMD added FSR Ray Regeneration and Radiance Caching alongside the Redstone release. Redstone is easily AMD’s slowest technology rollout yet. It is currently available in just two games, and not even with the full stack, because Radiance Caching is not available anywhere yet.<br />
<br />
<a href="https://videocardz.com/newz/amd-renames-anti-lag-2-to-fsr-latency-reduction-2" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[AMD marks AM4’s 10th anniversary, says AM5 will follow the same philosophy]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21695</link>
			<pubDate>Mon, 30 Mar 2026 09:38:21 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21695</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Zen4, Zen5 and Zen6: AM5 here to stay for long time</span><br />
<br />
AMD is again pointing to platform longevity as one of the main selling points of socket AM5. In comments tied to the Ryzen 9 9950X3D2 Dual Edition announcement, Jack Huynh said AMD sees long-term socket support as a customer commitment rather than a simple marketing line. That fits AMD’s existing public guidance, which states AM5 support will continue through 2027 and beyond.<br />
<br />
The timing of that message matters because AM4 is still active almost a decade after its debut. We just covered the <a href="https://videocardz.com/newz/amd-ryzen-5-5500x3d-appears-in-uk-retail-listing-am4-x3d-lineup-stays-alive" target="_blank" rel="noopener" class="mycode_url">Ryzen 5 5500X3D appearing at UK retailer</a>, even though AMD has previously treated that processor as a regional part. That listing was another reminder that AM4 has outlived the normal desktop socket cycle and is still getting fresh retail movement in 2026.<br />
 <br />
<blockquote class="mycode_quote"><cite>Quote:</cite>“With AM4, we built a platform that made it easy for customers to upgrade their PC across multiple generations of processors. <span style="font-weight: bold;" class="mycode_b">And this year, we celebrate its ten-year anniversary,</span> supported by an expansive line of processors powering millions of systems around the world.<br />
<br />
<span style="font-weight: bold;" class="mycode_b">That same philosophy continues with socket AM5.</span> Long-term platform support isn’t just a marketing message for us, it’s a commitment to protecting our customer’s investments and giving enthusiasts a platform that can grow with them.”<br />
<br />
— Jack Huynh, Senior Vice President and General Manager of Computing and Graphics at AMD</blockquote>
<br />
<a href="https://videocardz.com/newz/amd-marks-am4s-10th-anniversary-says-am5-will-follow-the-same-philosophy" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Zen4, Zen5 and Zen6: AM5 here to stay for long time</span><br />
<br />
AMD is again pointing to platform longevity as one of the main selling points of socket AM5. In comments tied to the Ryzen 9 9950X3D2 Dual Edition announcement, Jack Huynh said AMD sees long-term socket support as a customer commitment rather than a simple marketing line. That fits AMD’s existing public guidance, which states AM5 support will continue through 2027 and beyond.<br />
<br />
The timing of that message matters because AM4 is still active almost a decade after its debut. We just covered the <a href="https://videocardz.com/newz/amd-ryzen-5-5500x3d-appears-in-uk-retail-listing-am4-x3d-lineup-stays-alive" target="_blank" rel="noopener" class="mycode_url">Ryzen 5 5500X3D appearing at UK retailer</a>, even though AMD has previously treated that processor as a regional part. That listing was another reminder that AM4 has outlived the normal desktop socket cycle and is still getting fresh retail movement in 2026.<br />
 <br />
<blockquote class="mycode_quote"><cite>Quote:</cite>“With AM4, we built a platform that made it easy for customers to upgrade their PC across multiple generations of processors. <span style="font-weight: bold;" class="mycode_b">And this year, we celebrate its ten-year anniversary,</span> supported by an expansive line of processors powering millions of systems around the world.<br />
<br />
<span style="font-weight: bold;" class="mycode_b">That same philosophy continues with socket AM5.</span> Long-term platform support isn’t just a marketing message for us, it’s a commitment to protecting our customer’s investments and giving enthusiasts a platform that can grow with them.”<br />
<br />
— Jack Huynh, Senior Vice President and General Manager of Computing and Graphics at AMD</blockquote>
<br />
<a href="https://videocardz.com/newz/amd-marks-am4s-10th-anniversary-says-am5-will-follow-the-same-philosophy" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[Geekbench flags Intel Binary Optimization Tool results as potentially invalid]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21687</link>
			<pubDate>Thu, 26 Mar 2026 07:41:09 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21687</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Geekbench Browser now flags Intel BOT-capable CPU results</span> <br />
<br />
Primate Labs says the Geekbench Browser will now attach a warning to Geekbench 6 CPU results from processors that support<span style="font-weight: bold;" class="mycode_b"> Intel’s Binary Optimization Tool</span>, or BOT. The company says some Geekbench 6 workload scores can rise by up to 40% under BOT, while overall scores can increase by up to 8%. Primate Labs argues those runs <span style="font-weight: bold;" class="mycode_b">are not comparable</span> with standard Geekbench 6 submissions, and says it currently has no way to tell whether BOT was enabled for a specific result.<br />
<br />
<span style="font-weight: bold;" class="mycode_b">Intel launches BOT</span><br />
<br />
Intel introduced BOT with its Core Ultra 200S Plus and 200HX Plus launches as an optional feature inside the advanced mode of Intel Application Optimization. Intel describes it as a binary-level optimization <span style="font-weight: bold;" class="mycode_b">layer meant to improve IPC and native performance in select games and applications,</span> even when the workload was tuned for another x86 processor, a console, or an older architecture. Intel’s support page says BOT requires Intel Dynamic Tuning Technology and currently works with a short list of titles, including Geekbench 6.3+, which Intel labels as a “Proof of Concept.”<br />
<br />
<a href="https://videocardz.com/newz/geekbench-flags-intel-binary-optimization-tool-results-as-potentially-invalid" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Geekbench Browser now flags Intel BOT-capable CPU results</span> <br />
<br />
Primate Labs says the Geekbench Browser will now attach a warning to Geekbench 6 CPU results from processors that support<span style="font-weight: bold;" class="mycode_b"> Intel’s Binary Optimization Tool</span>, or BOT. The company says some Geekbench 6 workload scores can rise by up to 40% under BOT, while overall scores can increase by up to 8%. Primate Labs argues those runs <span style="font-weight: bold;" class="mycode_b">are not comparable</span> with standard Geekbench 6 submissions, and says it currently has no way to tell whether BOT was enabled for a specific result.<br />
<br />
<span style="font-weight: bold;" class="mycode_b">Intel launches BOT</span><br />
<br />
Intel introduced BOT with its Core Ultra 200S Plus and 200HX Plus launches as an optional feature inside the advanced mode of Intel Application Optimization. Intel describes it as a binary-level optimization <span style="font-weight: bold;" class="mycode_b">layer meant to improve IPC and native performance in select games and applications,</span> even when the workload was tuned for another x86 processor, a console, or an older architecture. Intel’s support page says BOT requires Intel Dynamic Tuning Technology and currently works with a short list of titles, including Geekbench 6.3+, which Intel labels as a “Proof of Concept.”<br />
<br />
<a href="https://videocardz.com/newz/geekbench-flags-intel-binary-optimization-tool-results-as-potentially-invalid" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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			<title><![CDATA[AMD releases FSR 4.1 for Radeon RX 9000 series, uses algorithm shared with Sony’s upd]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21673</link>
			<pubDate>Fri, 20 Mar 2026 07:16:34 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21673</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">AMD releases Adrenalin 26.3.1 for Crimson Desert, highlights FSR 4.1 update</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/AMD-FSR41-CRIMSON-HERO-1-1200x633.jpg" loading="lazy"  alt="[Image: AMD-FSR41-CRIMSON-HERO-1-1200x633.jpg]" class="mycode_img" /><br />
<br />
AMD has released <a href="https://videocardz.com/driver/amd-radeon-software-adrenalin-26-3-1" target="_blank" rel="noopener" class="mycode_url">Radeon Software Adrenalin Edition 26.3.1</a>, the same day Crimson Desert went live (I would say it was long overdue, but that’s just AMD’s thing). Pearl Abyss says the game launched globally today and that the PC version supports FSR 3/4 and AMD FSR Ray Regeneration.<br />
<br />
In AMD Gaming’s launch message for Crimson Desert, the company describes the update as <span style="font-weight: bold;" class="mycode_b">FSR Upscaling 4.1 and says it improves ML-based upscaling with finer detail, smoother camera motion, and better Ultra Performance Mode behavior. </span><br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/AMD-FSR41-1.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-FSR41-1-768x432.jpg" loading="lazy"  alt="[Image: AMD-FSR41-1-768x432.jpg]" class="mycode_img" /></a><br />
Source: AMD<br />
<br />
That also clarifies the current hardware target for FSR 4.1. There were some rumors that AMD might unlock FSR4 for older architectures; however, latest drivers clearly mention support <span style="font-weight: bold;" class="mycode_b">only for the Radeon RX 9000 series. </span><br />
<br />
<a href="https://videocardz.com/newz/amd-releases-fsr-4-1-for-radeon-rx-9000-series-uses-algorithm-shared-with-sonys-updated-pssr" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">AMD releases Adrenalin 26.3.1 for Crimson Desert, highlights FSR 4.1 update</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/AMD-FSR41-CRIMSON-HERO-1-1200x633.jpg" loading="lazy"  alt="[Image: AMD-FSR41-CRIMSON-HERO-1-1200x633.jpg]" class="mycode_img" /><br />
<br />
AMD has released <a href="https://videocardz.com/driver/amd-radeon-software-adrenalin-26-3-1" target="_blank" rel="noopener" class="mycode_url">Radeon Software Adrenalin Edition 26.3.1</a>, the same day Crimson Desert went live (I would say it was long overdue, but that’s just AMD’s thing). Pearl Abyss says the game launched globally today and that the PC version supports FSR 3/4 and AMD FSR Ray Regeneration.<br />
<br />
In AMD Gaming’s launch message for Crimson Desert, the company describes the update as <span style="font-weight: bold;" class="mycode_b">FSR Upscaling 4.1 and says it improves ML-based upscaling with finer detail, smoother camera motion, and better Ultra Performance Mode behavior. </span><br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/AMD-FSR41-1.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-FSR41-1-768x432.jpg" loading="lazy"  alt="[Image: AMD-FSR41-1-768x432.jpg]" class="mycode_img" /></a><br />
Source: AMD<br />
<br />
That also clarifies the current hardware target for FSR 4.1. There were some rumors that AMD might unlock FSR4 for older architectures; however, latest drivers clearly mention support <span style="font-weight: bold;" class="mycode_b">only for the Radeon RX 9000 series. </span><br />
<br />
<a href="https://videocardz.com/newz/amd-releases-fsr-4-1-for-radeon-rx-9000-series-uses-algorithm-shared-with-sonys-updated-pssr" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[AMD talks RyzenClaw and RadeonClaw, local agents on AMD hardware, if only you had 128]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21657</link>
			<pubDate>Sat, 14 Mar 2026 10:33:17 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21657</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">AMD explains how to run OpenClaw on their hardware</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZEN-CLAW-RADEON-CLAW-HERO-1200x624.jpg" loading="lazy"  alt="[Image: AMD-RYZEN-CLAW-RADEON-CLAW-HERO-1200x624.jpg]" class="mycode_img" /><br />
<br />
AMD has published a new OpenClaw guide built around what it calls “<span style="font-weight: bold;" class="mycode_b">RyzenClaw</span>” and “<span style="font-weight: bold;" class="mycode_b">RadeonClaw</span>,” two AMD hardware paths for running local AI agents on Windows. The first is a Ryzen AI Max+ system with 128GB of unified memory, while the second uses a Radeon AI PRO R9700 graphics card. AMD is pitching both as ways to run OpenClaw locally through WSL2, LM Studio, and a local model setup rather than relying on the cloud.<br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-3.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-3-768x432.jpg" loading="lazy"  alt="[Image: AMD-RYZENCLAW-RADEON-CLAW-3-768x432.jpg]" class="mycode_img" /></a><br />
Source: AMD<br />
<br />
RyzenClaw &amp; RadeonClawAMD’s “RyzenClaw” setup is not just any Ryzen AI Max+ laptop or mini PC, it specifically calls for a 128GB configuration, and AMD’s own instructions say users should reserve 96GB of variable graphics memory for that platform. That setup runs the Qwen 3.5 35B A3B model at about 45 tokens per second, supports a 260K token context window, and can handle up to six concurrent agents.<br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-1.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-1-768x433.jpg" loading="lazy"  alt="[Image: AMD-RYZENCLAW-RADEON-CLAW-1-768x433.jpg]" class="mycode_img" /></a> <a href="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-4.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-4-768x429.jpg" loading="lazy"  alt="[Image: AMD-RYZENCLAW-RADEON-CLAW-4-768x429.jpg]" class="mycode_img" /></a><br />
Source: AMD<br />
<br />
<a href="https://videocardz.com/newz/amd-talks-ryzenclaw-and-radeonclaw-local-agents-on-amd-hardware-if-only-you-had-128gb-memory" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">AMD explains how to run OpenClaw on their hardware</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZEN-CLAW-RADEON-CLAW-HERO-1200x624.jpg" loading="lazy"  alt="[Image: AMD-RYZEN-CLAW-RADEON-CLAW-HERO-1200x624.jpg]" class="mycode_img" /><br />
<br />
AMD has published a new OpenClaw guide built around what it calls “<span style="font-weight: bold;" class="mycode_b">RyzenClaw</span>” and “<span style="font-weight: bold;" class="mycode_b">RadeonClaw</span>,” two AMD hardware paths for running local AI agents on Windows. The first is a Ryzen AI Max+ system with 128GB of unified memory, while the second uses a Radeon AI PRO R9700 graphics card. AMD is pitching both as ways to run OpenClaw locally through WSL2, LM Studio, and a local model setup rather than relying on the cloud.<br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-3.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-3-768x432.jpg" loading="lazy"  alt="[Image: AMD-RYZENCLAW-RADEON-CLAW-3-768x432.jpg]" class="mycode_img" /></a><br />
Source: AMD<br />
<br />
RyzenClaw &amp; RadeonClawAMD’s “RyzenClaw” setup is not just any Ryzen AI Max+ laptop or mini PC, it specifically calls for a 128GB configuration, and AMD’s own instructions say users should reserve 96GB of variable graphics memory for that platform. That setup runs the Qwen 3.5 35B A3B model at about 45 tokens per second, supports a 260K token context window, and can handle up to six concurrent agents.<br />
<br />
<a href="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-1.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-1-768x433.jpg" loading="lazy"  alt="[Image: AMD-RYZENCLAW-RADEON-CLAW-1-768x433.jpg]" class="mycode_img" /></a> <a href="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-4.jpg" target="_blank" rel="noopener" class="mycode_url"><img src="https://cdn.videocardz.com/1/2026/03/AMD-RYZENCLAW-RADEON-CLAW-4-768x429.jpg" loading="lazy"  alt="[Image: AMD-RYZENCLAW-RADEON-CLAW-4-768x429.jpg]" class="mycode_img" /></a><br />
Source: AMD<br />
<br />
<a href="https://videocardz.com/newz/amd-talks-ryzenclaw-and-radeonclaw-local-agents-on-amd-hardware-if-only-you-had-128gb-memory" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
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			<title><![CDATA[Scientists invent entirely new kind of storage – and it could change the course of hu]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21655</link>
			<pubDate>Fri, 13 Mar 2026 07:51:35 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1929">schreckdeividas</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21655</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite>Scientists have invented a new kind of storage – and suggest that it could change the course of human history.<br />
<br />
The storage uses laser-modified glass to encode information. And that information could last for more than 10,000 years, they say.<br />
<br />
The world is generating far more information than it ever has. But storing that information has proven difficult: the hard disks inside of our computer, for instance, degrade relatively quickly, leading to fears that the vast amount of information we are generating could be lost one day soon.<br />
<br />
Researchers have suggested in the past that storing that information in glass could be a helpful way of keeping it around for civilisation in the future. But it has so far proven impossible to actually write or retrieve that data.</blockquote>
<br />
Source----@<a href="https://www.the-independent.com/tech/glass-storage-silica-microsoft-b2922951.html" target="_blank" rel="noopener" class="mycode_url">Independent</a>]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite>Scientists have invented a new kind of storage – and suggest that it could change the course of human history.<br />
<br />
The storage uses laser-modified glass to encode information. And that information could last for more than 10,000 years, they say.<br />
<br />
The world is generating far more information than it ever has. But storing that information has proven difficult: the hard disks inside of our computer, for instance, degrade relatively quickly, leading to fears that the vast amount of information we are generating could be lost one day soon.<br />
<br />
Researchers have suggested in the past that storing that information in glass could be a helpful way of keeping it around for civilisation in the future. But it has so far proven impossible to actually write or retrieve that data.</blockquote>
<br />
Source----@<a href="https://www.the-independent.com/tech/glass-storage-silica-microsoft-b2922951.html" target="_blank" rel="noopener" class="mycode_url">Independent</a>]]></content:encoded>
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			<title><![CDATA[AMD reveals “FSR Diamond” for Next-Gen Xbox, but is it RDNA5 exclusive?]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21653</link>
			<pubDate>Thu, 12 Mar 2026 10:15:08 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21653</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">AMD confirms FSR Diamond as a new codename during Project Helix reveal</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/FSR-DIAMON-HERO-VIDEOCARDZ-1200x620.jpg" loading="lazy"  alt="[Image: FSR-DIAMON-HERO-VIDEOCARDZ-1200x620.jpg]" class="mycode_img" /><br />
<br />
Non-official AI renderAMD has now attached a new name to its next FSR stack. In a social media post published after Microsoft’s Project Helix presentation at GDC 2026, AMD SVP and GM Jack Huynh referred to the technology as <span style="font-weight: bold;" class="mycode_b">AMD FSR Diamond,</span> tying it directly to Xbox’s next-generation platform plans. Microsoft had already said Helix will use a custom AMD chip and a next-gen FSR path with machine learning features. Neither AMD nor Microsoft has confirmed RDNA5 as the GPU backbone of the new console. <br />
<br />
Huynh says FSR Diamond as being <span style="font-weight: bold;" class="mycode_b">built for next-generation neural rendering, with next-gen ML-based upscaling, a new ML-based multi-frame generation path, and next-gen ray regeneration for ray tracing and path tracing.</span> <br />
<br />
<a href="https://videocardz.com/newz/amd-reveals-fsr-diamond-for-next-gen-xbox-but-is-it-rdna5-exclusive" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">AMD confirms FSR Diamond as a new codename during Project Helix reveal</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/FSR-DIAMON-HERO-VIDEOCARDZ-1200x620.jpg" loading="lazy"  alt="[Image: FSR-DIAMON-HERO-VIDEOCARDZ-1200x620.jpg]" class="mycode_img" /><br />
<br />
Non-official AI renderAMD has now attached a new name to its next FSR stack. In a social media post published after Microsoft’s Project Helix presentation at GDC 2026, AMD SVP and GM Jack Huynh referred to the technology as <span style="font-weight: bold;" class="mycode_b">AMD FSR Diamond,</span> tying it directly to Xbox’s next-generation platform plans. Microsoft had already said Helix will use a custom AMD chip and a next-gen FSR path with machine learning features. Neither AMD nor Microsoft has confirmed RDNA5 as the GPU backbone of the new console. <br />
<br />
Huynh says FSR Diamond as being <span style="font-weight: bold;" class="mycode_b">built for next-generation neural rendering, with next-gen ML-based upscaling, a new ML-based multi-frame generation path, and next-gen ray regeneration for ray tracing and path tracing.</span> <br />
<br />
<a href="https://videocardz.com/newz/amd-reveals-fsr-diamond-for-next-gen-xbox-but-is-it-rdna5-exclusive" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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			<title><![CDATA[Intel XeSS 3.0 SDK released, still not open source]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21646</link>
			<pubDate>Tue, 10 Mar 2026 10:22:48 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21646</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Intel promised open-source XeSS four years ago, but XeSS 3.0 arrives as Windows binaries</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/INTEL-ARC-XESS3-HERO-1200x624.jpg" loading="lazy"  alt="[Image: INTEL-ARC-XESS3-HERO-1200x624.jpg]" class="mycode_img" /><br />
<br />
Phoronix reports that Intel has updated its XeSS Software Development Kit on GitHub. The new release adds XeSS 3.0 support, including <span style="font-weight: bold;" class="mycode_b">multi-frame generation</span> and updated frame generation models. The first question was whether Intel had finally turned XeSS into an open-source project.<br />
<br />
That still has not happened. In 2021, Intel’s <a href="https://x.com/Kaplanyan/status/1449777932851761159" target="_blank" rel="noopener" class="mycode_url">Anton Kaplanyan said XeSS would be open source</a>. Four years later, XeSS 1, XeSS 2, and now XeSS 3.0 have all arrived without a public source release for the core runtime components.<br />
<br />
Intel does host the XeSS SDK on GitHub, and the package can be downloaded freely under its license. However, the actual release still relies on precompiled Windows DLL files rather than source code. Phoronix says the new SDK ships with binary-only Windows libraries, including libxess.dll, libxell.dll, and libxess_fg.dll.<br />
<br />
<a href="https://videocardz.com/newz/intel-xess-3-0-sdk-released-still-not-open-source" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">Intel promised open-source XeSS four years ago, but XeSS 3.0 arrives as Windows binaries</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/03/INTEL-ARC-XESS3-HERO-1200x624.jpg" loading="lazy"  alt="[Image: INTEL-ARC-XESS3-HERO-1200x624.jpg]" class="mycode_img" /><br />
<br />
Phoronix reports that Intel has updated its XeSS Software Development Kit on GitHub. The new release adds XeSS 3.0 support, including <span style="font-weight: bold;" class="mycode_b">multi-frame generation</span> and updated frame generation models. The first question was whether Intel had finally turned XeSS into an open-source project.<br />
<br />
That still has not happened. In 2021, Intel’s <a href="https://x.com/Kaplanyan/status/1449777932851761159" target="_blank" rel="noopener" class="mycode_url">Anton Kaplanyan said XeSS would be open source</a>. Four years later, XeSS 1, XeSS 2, and now XeSS 3.0 have all arrived without a public source release for the core runtime components.<br />
<br />
Intel does host the XeSS SDK on GitHub, and the package can be downloaded freely under its license. However, the actual release still relies on precompiled Windows DLL files rather than source code. Phoronix says the new SDK ships with binary-only Windows libraries, including libxess.dll, libxell.dll, and libxess_fg.dll.<br />
<br />
<a href="https://videocardz.com/newz/intel-xess-3-0-sdk-released-still-not-open-source" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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			<title><![CDATA[JEDEC publishes UFS 5.0 spec with up to 10.8 GB/s sequential throughput]]></title>
			<link>https://www.geeks.fyi/showthread.php?tid=21618</link>
			<pubDate>Sun, 01 Mar 2026 08:17:26 +0000</pubDate>
			<dc:creator><![CDATA[<a href="https://www.geeks.fyi/member.php?action=profile&uid=1322">harlan4096</a>]]></dc:creator>
			<guid isPermaLink="false">https://www.geeks.fyi/showthread.php?tid=21618</guid>
			<description><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">KIOXIA starts sampling UFS 5.0 devices after JEDEC publishes the 5.0 spec</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/02/KIOXIA-UFS5-1200x624.jpg" loading="lazy"  alt="[Image: KIOXIA-UFS5-1200x624.jpg]" class="mycode_img" /><br />
<br />
UFS 5.0 has been published, and the spec targets up to 10.8 GB/s for sequential read and write throughput. That is close to a 2x jump over the 5.8 GB/s figure commonly quoted for UFS 4.0 class devices,<span style="font-weight: bold;" class="mycode_b"> and it also exceeds the 8.0 GB/s</span> one-direction bandwidth limit of a PCIe 4.0 x4 link on paper. <br />
<br />
The speed increase is tied to the physical layer update. KIOXIA’s announcement points to MIPI M-PHY v6.0 and its HS-GEAR6 mode (up to 46.6 Gbps per lane), which is how a 2-lane configuration reaches about 10.8 GB/s effective performance. <br />
<br />
The UFS 5.0 features include improved signal integrity, improved power integrity, and new data protection features, rather than only raising the peak transfer number. <br />
<br />
<a href="https://videocardz.com/newz/jedec-publishes-ufs-5-0-spec-with-up-to-10-8-gb-s-sequential-throughput" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></description>
			<content:encoded><![CDATA[<blockquote class="mycode_quote"><cite>Quote:</cite><span style="font-weight: bold;" class="mycode_b">KIOXIA starts sampling UFS 5.0 devices after JEDEC publishes the 5.0 spec</span><br />
<br />
<img src="https://cdn.videocardz.com/1/2026/02/KIOXIA-UFS5-1200x624.jpg" loading="lazy"  alt="[Image: KIOXIA-UFS5-1200x624.jpg]" class="mycode_img" /><br />
<br />
UFS 5.0 has been published, and the spec targets up to 10.8 GB/s for sequential read and write throughput. That is close to a 2x jump over the 5.8 GB/s figure commonly quoted for UFS 4.0 class devices,<span style="font-weight: bold;" class="mycode_b"> and it also exceeds the 8.0 GB/s</span> one-direction bandwidth limit of a PCIe 4.0 x4 link on paper. <br />
<br />
The speed increase is tied to the physical layer update. KIOXIA’s announcement points to MIPI M-PHY v6.0 and its HS-GEAR6 mode (up to 46.6 Gbps per lane), which is how a 2-lane configuration reaches about 10.8 GB/s effective performance. <br />
<br />
The UFS 5.0 features include improved signal integrity, improved power integrity, and new data protection features, rather than only raising the peak transfer number. <br />
<br />
<a href="https://videocardz.com/newz/jedec-publishes-ufs-5-0-spec-with-up-to-10-8-gb-s-sequential-throughput" target="_blank" rel="noopener" class="mycode_url">Continue Reading...</a></blockquote>
]]></content:encoded>
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